The present invention relates to semiconductor, and more specifically, to gate all around nanowire semiconductor devices.
The MOSFET is a transistor used for amplifying or switching electronic signals. The MOSFET has a source, a drain, and a metal oxide gate electrode. The metal gate is electrically insulated from the main semiconductor n-channel or p-channel by a thin layer of insulating material, for example, silicon dioxide or glass, which makes the input resistance of the MOSFET relatively high. The gate voltage controls whether the path from drain to source is an open circuit (“off”) or a resistive path (“on”).
N-type field effect transistors (NFET) and p-type field effect transistors (PFET) are two types of complementary MOSFETs. The NFET uses electrons as the current carriers and with n-doped source and drain junctions. The PFET uses holes as the current carriers and with p-doped source and drain junctions.
The nanowire MOSFET is a type of MOSFET with multiple-gates or gates all around a channel region of the semiconductor nanowire. The nanowire MOSFET device mitigates the effects of short channels and reduces drain-induced barrier lowering. The nanowire refers to the narrow channel between source and drain regions.